CPU（中央處理器）
Central Processing Unit. The part of a processor that executes instructions.
中央處理器。處理器中執(zhí)行指令的那一部分。

Compiler（編譯器）
A software development tool that translates high-level language programs into the machine-language instructions that a particular processor can understand and execute. 
把高級編程語言程序轉換到只有特定的處理器能了解和執(zhí)行的機器指令的一種軟件開發(fā)包。

context （上下文）
The current state of the processor"s registers and flags.
處理器當前的狀態(tài)和標志。

context switch（上下文切換）
The process of switching from one task to another in a multitasking operating system. A context switch involves saving the context of the running task and restoring the previously-saved context of the other. The piece of code that does this is necessarily processor-specific.
在多任務操作系統(tǒng)中我一個任務切換到另一個的過程。上下文切換包括保存正在運行的任務的上下文和恢復早先保存的另一個任務的上下文。做這個工作的一段代碼必須具有處理器特權。

counting semaphore（計數(shù)信號）
A type of semaphore that is used to track multiple resources of the same type. An attempt to take a counting semaphore is blocked only if all of the available resources are in use. Contrast with binary semaphore.
一種用來跟蹤多個相同類型資源的信號燈。僅僅在所有可用的資源都被用完了時才阻塞。相對二元信號而言。

critical section（臨界段）
A block of code that must be executed in sequence and without interruption to guarantee correct operation of the software. See also race condition. 
一段必須按次序執(zhí)行的代碼，并且不能被中斷，否則不能保證軟件正確地操作。參照：競爭狀況。

cross-compiler（交叉編譯器）
 A compiler that runs on a different platform than the one for which it produces object code. A cross-compiler runs on a host computer and produces object code for the target.
一個運行在不同的平臺上的編譯器，其中之一能產生目標代碼。交叉編譯器在主機上運行并且產生目標機的目標代碼。

D
DMA（直接內存訪問）
Direct Memory Access. A technique for transferring data directly between two peripherals (usually memory and an I/O device) with only minimal intervention by the processor. DMA transfers are managed by a third peripheral called a DMA controller. 
直接內存訪問。一種直接在兩個外設（通常是內存和I/O設備）之間進行數(shù)據(jù)傳輸?shù)募夹g，它只要處理器最少的介入。DMA傳輸由叫DMA控制器的第三方外設進行管理。

DRAM（動態(tài)隨機訪問存儲器）
Dynamic Random-Access Memory. A type of RAM that maintains its contents only as long as the data stored in the device is refreshed at regular intervals. The refresh cycles are usually performed by a peripheral called a DRAM controller.
動態(tài)隨機訪問存儲器。一種RAM，存儲在其設備中的數(shù)據(jù)被定期刷新時才能保存它的內容。刷新周期一般由一個叫DRAM控制器的外設完成。

Data bus（數(shù)據(jù)總線）
A set of electrical lines connected to the processor and all of the peripherals with which it communicates. When the processor wants to read (write) the contents of a memory location or register within a particular peripheral, it sets the address bus pins appropriately and receives (transmits) the contents on the data bus. 
連接處理器與所有外設進行通訊的電子線路集。當一個處理器想去寫（讀）某一特定外設中的存儲器地址或寄存器中的內容時，處理器設置地址總線并在數(shù)據(jù)總線上接收（傳輸）內容。

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